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|Notes||TI Signal name||IBM Signal Name||Pin||Pin||IBM Signal Name||TI Signal name||Notes|
|||Ground||Ground||B1||A1||-I/O CH CK||NMI|||
|||RESET||RESET DRV||B2||A2||SD7||Data 7|||
|||+5 V dc||+5 V dc||B3||A3||SD6||Data 6|||
|||IR0 (interrupt 0)||IRQ 9||B4||A4||SD5||Data 5|||
|||no connection (bused)||-5 V dc||B5||A5||SD4||Data 4|||
|||no connection (bused)||DRQ2||B6||A6||SD3||Data 3|||
|||-12 V dc||-12 V dc||B7||A7||SD2||Data 2|||
|||DMA (CPU enable)||-0WS||B8||A8||SD1||Data 1|||
|||+12 V dc||+12 V dc||B9||A9||SD0||Data 0|||
|||Ground||Ground||B10||A10||I/O CH RDY||WAIT|||
|||AMWC (memory write)||-SMEMW||B11||A11||AEN||Logic ground|||
|||MRDC (memory read)||-SMEMR||B12||A12||SA19||Address 19 (MSB)|||
|||AIOWC (I/O write)||-IOW||B13||A13||SA18||Address 18|||
|||IORC (I/O read)||-IOR||B14||A14||SA17||Address 17|||
|||no connection (bused)||-DACK3||B15||A15||SA16||Address 16|||
|||no connection (bused)||DRQ3||B16||A16||SA15||Address 15|||
|||no connection (bused)||-DACK1||B17||A17||SA14||Address 14|||
|||no connection (bused)||DRQ1||B18||A18||SA13||Address 13|||
|||no connection (bused)||-REFRESH||B19||A19||SA12||Address 12|||
|||PCLK (5-MHz clock)||CLK||B20||A20||SA11||Address 11|||
|||IR6 (interrupt 6)||IRQ7||B21||A21||SA10||Address 10|||
|||IR5 (interrupt 5)||IRQ6||B22||A22||SA9||Address 9|||
|||IR4 (interrupt 4)||IRQ5||B23||A23||SA8||Address 8|||
|||IR2 (interrupt 2)||IRQ4||B24||A24||SA7||Address 7|||
|||IR1 (interrupt 1)||IRQ3||B25||A25||SA6||Address 6|||
|||no connection (bused)||-DACK2||B26||A26||SA5||Address 5|||
|||RFSH (refreshing)||TC||B27||A27||SA4||Address 4|||
|||ALE (address latch)||BALE||B28||A28||SA3||Address 3|||
|||+5 V dc||+5 V dc||B29||A29||SA2||Address 2|||
|||OSC (15-MHz clock)||OSC||B30||A30||SA1||Address 1|||
|||Ground||Ground||B31||A31||SA0||Address 0 (LSB)|||
 All these pins have the same function with both the IBM and TI busses although the terminology may differ ("AIOWC" vs. "-IOW" where IBM omits the "A" to indicate an advanced signal, one sent ahead of time to give the circuits time to prepare to carry out the operation and uses a preceding "-" to indicate an active low signal where TI uses a trailing "C" to indicate a "Complemented" (active low) signal or the completely different names of "NMI" and "-I/O CH CK" for the same function).
 Both busses use these for interrupts and they are identical as far as hardware is concerned. Only the software need differ because different interrupts are activated and different interrupt vectors are used. On the TI, these are used:
Pin Hardware interrupt Interrupt vector number B4 IR0 INT 40h B21 IR6 INT 46h (disk controller) B22 IR5 INT 45h B23 IR4 INT 44h B24 IR2 INT 42h (communications) B25 IR1 INT 41h
 No -5V dc is available on the TI. You *could* plug in a card that took the -12V dc from pin B7 and converted it to -5V output on pin B5 to be used by other cards taking the -5 V dc from that pin. (The "bused" means that there is no connection between the TI PC and that pin on the bus but all of the same-numbered "bused" pins on the card connectors are tied together.)
 (See also Note ) The signals on the IBM PC on these lines are all associated with DMA or refresh. The TI does not use DMA and the refresh method differs on the TI so any IBM card that uses these features will be unusable on the TI.
 The signals on these pins differ on the IBM and on the TI but I don't know what conditions are necessary for either of the signals to be invoked or used and have seen no ill effects plugging in an IBM-compatable video card and accessing its static memory.
 These carry comparable clock signals on the TI PC and the IBM PC. The frequencies of the clocks differ, however, and anything that is timing-critical should not rely on the clocks being the same.
 Forced low on the TI which would disable any DMA on IBM cards.
More information on the IBM PC bus can be found at:
More information on the TI Professional bus can be found at ..., um, well, I can't find anyplace unless you can find a copy of the December, 1983 issue of Byte magazine.